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VLSI architecture of a Multiple-Error-Correction Polar-Codes decoder

Nicola Antonio Travaglini

VLSI architecture of a Multiple-Error-Correction Polar-Codes decoder.

Rel. Maurizio Martina, Guido Masera. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2019

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Abstract:
Relators: Maurizio Martina, Guido Masera
Academic year: 2018/19
Publication type: Electronic
Number of Pages: 81
Subjects:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/11028
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