polito.it
Politecnico di Torino (logo)

VLSI architecture of a Multiple-Error-Correction Polar-Codes decoder

Nicola Antonio Travaglini

VLSI architecture of a Multiple-Error-Correction Polar-Codes decoder.

Rel. Maurizio Martina, Guido Masera. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2019

[img]
Preview
PDF (Tesi_di_laurea) - Tesi
Document access: Anyone
Licenza: Creative Commons Attribution Non-commercial No Derivatives.

Download (13MB) | Preview
Abstract:
Relators: Maurizio Martina, Guido Masera
Academic year: 2018/19
Publication type: Electronic
Number of Pages: 81
Subjects:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/11028
Modify record (reserved for operators) Modify record (reserved for operators)