Analysis and Design of a Low Power Analog-to-Information Architecture - WebThesis

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Analysis and Design of a Low Power Analog-to-Information Architecture

Carmine Paolino

Analysis and Design of a Low Power Analog-to-Information Architecture.

Rel. Gianluca Setti, Fabio Pareschi. Politecnico di Torino, Master of science program in Electronic Engineering, 2019

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Relators

Gianluca Setti, Fabio Pareschi

Publication type

Electronic

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https://webthesis.biblio.polito.it/id/eprint/11013

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