Politecnico di Torino (logo)

Consolidation of Secure and Safety applications on a single heterogeneous multi-core platform

Enrico Barberis

Consolidation of Secure and Safety applications on a single heterogeneous multi-core platform.

Rel. Massimo Violante. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2019


In the last years, processors dedicated to embedded systems became more and more powerful enabling heterogeneous multi-core platforms. This created a new trend in combining multiple Electronic Control Units into a single System on Chip. These new platforms can be used to reduce the power consumption, the production cost, and design complexity. On the other hand, this approach introduces new problems regarding software isolation. For example, in an automotive use case, it is unacceptable that an issue in the infotainment software can cause a failure in the electric braking system. To solve this problem, it is possible to exploit processor features, such as ARM TrustZone, to ensure isolation at hardware level between many sub-systems. In this direction, VOSYSMonitor, a aort of type-1 hypervisor, was designed to allow the co-execution of Real-Time Operating Systems and General Purpose Operating Systems on the same CPU, while ensuring a strong isolation between them. This document is the final report about the internship performed at Virtual Open Systems, the company that developed VOSYSMonitor. The internship was all focused on the implementation of new features for this hypervisor. The support of OP-TEE, an open source Trusted Execution Environment, on top of VOSYSMonitor was the first task. Thanks to this, it was possible to deploy a first proof of concept to expose the newly gained capabilities. In the end, a significant structural change in VOSYSMonitor was made to allow the execution of multiple secure Operating Systems. In this report, all the steps required to reach this final goal are discussed. The document is structured in three main chapter in which each of the three aforementioned tasks is respectively described. In the last part, some conclusions on the possibility of the new included features are discussed.

Relators: Massimo Violante
Academic year: 2018/19
Publication type: Electronic
Number of Pages: 69
Additional Information: Tesi secretata. Fulltext non presente
Corso di laurea: Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering)
Classe di laurea: New organization > Master science > LM-32 - COMPUTER SYSTEMS ENGINEERING
Ente in cotutela: EURECOM - Telecom Paris Tech (FRANCIA)
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/10897
Modify record (reserved for operators) Modify record (reserved for operators)