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List of theses with "Carpegna, Alessio as relator"

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Number of items: 4.

28 October 2022

[img] Mauro Lanza. Development of a high-performance Linux device driver for a custom SNN accelerator for Xilinx FPGA boards. Rel. Stefano Di Carlo, Alessandro Savino, Alessio Carpegna. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2022

27 October 2023

[img] Enrico Magliano. AI-based soft error detection for embedded applications. Rel. Stefano Di Carlo, Alessandro Savino, Alessio Carpegna. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2023

11 April 2024

[img] Liqi Zeng. Development of a hardware module for online learning on spiking neural networks with partial reconfiguration on FPGA. Rel. Stefano Di Carlo, Alessandro Savino, Alessio Carpegna. Politecnico di Torino, UNSPECIFIED, 2024

[img] Dario Padovano. SpikExplorer: a tool for Design Space Exploration of Spiking Neural Network Architecture. Rel. Stefano Di Carlo, Alessandro Savino, Alessio Carpegna. Politecnico di Torino, UNSPECIFIED, 2024

This list was generated on Wed May 15 10:21:22 2024 CEST.