Design of a Signal Acquisition System for Local Field Potentials (LFPs)

This dissertation explores the feasibility of a low-power signal acquisition system designed exclusively for in-vivo peripheral neural recordings, leveraging the nRF5340 SoC from Nordic Semiconductor. The primary objective was to assess whether the on-chip Successive Approximation Register Analog-to-Digital Converter (SAADC) could be adapted for Local Field Potential (LFP) recordings. Specifically, the ADC should be capable of accurately sampling signals in the hundred-microvolt range, with a frequency bandwidth between 250 and 500 Hz, ensuring signal integrity for neuroscientific applications. To validate the acquisition system for this application, the peripheral ADC was programmed with a maximum sampling frequency of 1 kHz, while the differential data acquired from the development board was stored in real time on an external microSD card, formatted with the FAT file system, and communicated with the SoC via an 8 MHz SPI protocol. Tests revealed several challenges related to the system’s ability to capture low-amplitude signals and accurately record specific frequency ranges, highlighting the necessity of an external dedicated ADC to effectively handle these signals. Future improvements will also focus on enhancing the system’s reliability through optimized scheduler programming.