Alessio Naclerio
HLS techniques for high performance parallel codes in Logic-in-Memory systems.
Rel. Mariagrazia Graziano, Giovanna Turvani, Maurizio Zamboni. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2022
|
Preview |
PDF (Tesi_di_laurea)
- Tesi
Licenza: Creative Commons Attribution Non-commercial No Derivatives. Download (1MB) | Preview |
Abstract
In recent years, several researches have been conducted at the VLSI Laboratory of Politecnico di Torino on Logic-in-Memory (LiM) systems. This type of architectures aims to overcome the drawbacks due to the performance gap between CPU and memory, usually referred to as Von Neumann Bottleneck, by integrating simple computational units inside the memory cells. The regular structure of LiM arrays also allows for efficient parallel processing. Octantis is a High-Level Synthesis (HLS) tool for the exploration of LiM systems. It analyzes a C algorithm and generates a LiM architecture optimized for its execution, through the typical steps of HLS. The allocation phase collects user-defined constraints, the scheduling assigns to each instruction an execution time and the binding performs the mapping of operations on a LiM system.
Finally, the code emission phase produces the description of the synthesized circuit through configuration files for DEXiMA, a LiM simulator developed in the same research context that characterizes the circuit in terms of space occupation and static and dynamic power consumption
Relatori
Tipo di pubblicazione
URI
![]() |
Modifica (riservato agli operatori) |
