In the last years, high-performance computing requirements leaded to unite the advantages brought by parallel computing typical of graphic processors with the flexibility of the general-purpose programming. This is how the so-called GPGPUs (General-Purpose Graphic Processing Units) have started to be developed and diffused on the market. However, due to their rigid microarchitectural features, GPGPUs are not available as support unit for most of the computing systems. On the contrary, FPGAs (Field Programmable Gate Array) are can be seen as soft (reconfigurable) hardware accelerators to be placed next to CPUs, because they are perfectly adaptable to the designer requirements. Although, when using FPGAs a certain degree of expertise in HDL (Hardware Description Language) coding is expected, and besides, reconfiguration of the logic may take unaffordable times.