The advent of high-performance computing on aircraft computer platforms introduces several design challenges. In particular, digital fly-by-wire Flight Control Computers rely on sophisticated actuation control loop algorithms, which demand significant hardware resources for efficient execution. To address these challenges, the AMD Xilinx Versal ACAP (Adaptive Compute Acceleration Platform) provides a cutting-edge and promising architecture. This FPGA is the industry’s first compute platform that integrates dedicated acceleration engines (AI Engines) for scalar and vector processing, tightly coupled with programmable logic and configurable on-chip connectivity. Such a heterogeneous architecture enables the design of customized, high-performance hardware solutions. This thesis, carried out in collaboration with Leonardo Electronics, investigates the development of digital microarchitectures for airborne electronic modules on the Versal platform, and evaluates their hardware implementation both in standard DSP logic blocks and in AI Engines according to the required operation schedules.