Analysis and Design of a Digital-Based Operational Transconductance Amplifier for Neural Signal Acquisition

The thesis activity is in the framework of the European research project CEREBRO, which aims to develop a new non-invasive brain imaging technique with higher spatial resolution than conventional EEG, which is limited by signal attenuation through the skull. To overcome this limitation, the project proposes acquiring neural signals directly at the brain interface and transmitting them at higher frequencies, reducing the effect of signal loss through skull. This approach requires the design of tens-of-micrometer scale, remotely-powered CMOS circuits capable of detecting very low-amplitude brain signals and enabling wireless transmission. This thesis addresses one of the main challenges of the CEREBRO system by exploring and adapting the concept of the Digital-Based Operational Transconductance Amplifier (DIGOTA) as a neural-interface amplifier. This architecture provides a promising solution to reduce both power consumption and silicon area while maintaining adequate performance for neural signal acquisition. A key innovation of this work is also the use of the intrinsic resistive and capacitive properties of the electrodes, usually considered parasitic, as functional elements in the circuit. Instead of implementing dedicated resistors and capacitors on silicon, the characteristics of the electrode–solution interface and the coupling between electrodes are exploited as part of the circuit design. This strategy allows for a significant reduction of area. A differential-output, fully passive-free version of DIGOTA was designed and implemented using Cadence Virtuoso. The circuit was first simulated with a simplified electrode model and later with a more detailed one, including frequency-dependent elements, to better represent real-world conditions. Simulation results show that the circuit output is a train of pulses whose amplitude depends on the input signal. This behavior allows the same circuit to be used for both signal acquisition and direct high-frequency data transmission, eliminating the need for a VCO block and thus saving additional area and power. To better control the pulse frequency and further reduce power consumption, an additional capacitance was introduced in the compensation stage. One of the challenges was the lack of a accurate model for the electrodes to be used in the simulation. To overcome this, parameters from existing studies were adapted, and simulations were performed across a wide range of values to ensure robustness. The final circuit layout was designed to meet strict area constraints. Post-layout simulations, including Corner Analysis and Monte Carlo analysis, were performed and compared with schematic-level results to evaluate the effects of parasitics and process variations. As a final step, a MATLAB script that calculates the conductance between all electrode pairs was used to explore various electrode geometries and arrangements, including both actual and floating dummy electrodes. The configuration that best matched the circuit model assumptions was selected and implemented in the final layout. The circuit has now been sent for fabrication, and the next step is to conduct test both on the standalone amplifier and in a test setup reproducing the characteristics of the operating environment. These tests will also provide the opportunity to further refine the electrode models, improving the design and making necessary adjustments based on the measured performance.