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DExIMA A synthesis tool and performance estimator for Logic-in-Memory architectures

Loris Mendola

DExIMA A synthesis tool and performance estimator for Logic-in-Memory architectures.

Rel. Maurizio Zamboni, Mariagrazia Graziano, Giovanna Turvani. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2021

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Abstract:

In this thesis, we will produce a detailed analysis of the tool called DExIMA, from the high-level description to the more detailed one. The tool was previously developed by Nicola Piano in its first version. In this thesis, we will analyze the first version of the program, and we will successively rewrite it completely from zero, changing the structure and the modes of computations of the program. All this work is done to improve several aspects of the code and the interface with the user. Developed in C++, DExIMA word stands for Design-Explorer for In-Memory Architecture, because it is used to explore the solution spaces of the possible Logic-in-Memory (LiM) approach. The first part of this thesis is dedicated to the description of what a LiM is, and how it works, considering the state of the art of this technology and its applications. After the explanation of LiM concept, there is a chapter describing the motivation of this thesis and the general characteristics of DExIMA. Following the general chapters, there are the ones related to the tool. The core of the thesis is dived into the following parts: DExIMA: This chapter is dedicated to the architecture of the program and explains to the user which are the external components involved in the program, and to understand how to approach it. DExIMA Language: This chapter is a guide for the user since it explains the syntax used in the configuration file of DExIMA. DExIMA Files Descriptions: This chapter describes the fields and the information of the output files of DExIMA and how to interpret it. DExIMA Hardware Models: This chapter describes in detail the models of the gates realized in DExIMA from a low-level point of view. DExIMA Data Structure: This chapter is related to the class structure of the program and the function that these classes have inside the program. Compilation Process: This chapter describes how the Compilation process involves, and the event triggered when it parses the input configuration file. Performance Computation: This last chapter is related to how DExIMA works and explains how the performance is computed inside the tool. The last part of this thesis is dedicated to some results obtained from the tool, from a general point of view, and a specific case of study implementing a Binary Neural Network. In the end, there is a chapter dedicated to the future improvement of the tool. There is also an Appendix with some useful data related to the language and the components library.

Relatori: Maurizio Zamboni, Mariagrazia Graziano, Giovanna Turvani
Anno accademico: 2020/21
Tipo di pubblicazione: Elettronica
Numero di pagine: 208
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: NON SPECIFICATO
URI: http://webthesis.biblio.polito.it/id/eprint/17852
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