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Exploring Neural-symbolic Integration Architectures for Computer Vision

Adriele Burco

Exploring Neural-symbolic Integration Architectures for Computer Vision.

Rel. Andrea Calimera. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2018

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The aim of this thesis is to design an efficient and fast algorithm for image recognition to be embedded in low-power devices. By using the brain-inspired hyperdimensional computing (HD), the input image is directly projected into the binary space where all the computations are performed by the cheap xor-popcount operator. The HD alone cannot compete with the state of the art, for this reason some feature extractors have been added to the HD. The thesis is composed of six chapters. The first one is introductory and describes the state of the art, the related issues and how the HD could be exploited for Computer Vision applications. Chapters 2-4 explore the accuracy-complexity solution space. Each chapter deals with a new architecture while the complexity is gradually increased: it begins with a general description of the background, it continues with the description of the method and finally it ends with a careful analysis of the results by giving reasons behind failing experiments and promising methods. Chapter 2 is a direct application of HD on rough data, which is optimal for simple dataset but it does not scale well to harder ones. Chapter 3 deals with an unsupervised training of image filters, where we focus on a distance preserving binarization technique of the filter outcome and on the spatial correlation between patches. In Chapter 4 an efficient method for the binarization of the last layer of a Binirized Convolutional Neural Network is proposed, which turns to be useful also in the analysis of hidden layers. Chapter 5 explores instead the activity recognition domain and it explains the insurmountable issue related to the frame sequencing by using the HD computing. In the last chapter, an overall view of our experiments and few thoughts on future work are given.

Relators: Andrea Calimera
Academic year: 2018/19
Publication type: Electronic
Number of Pages: 111
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Ente in cotutela: ETH Zurich (SVIZZERA)
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/9034
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