Claudia Maddalena
Impact of Hardware Non-Idealities on Analog In-Memory Neural Network Inference: Simulation and Validation.
Rel. Fernando Corinto, Alon Ascoli, Valeria Bragaglia. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2025
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Abstract
In the last decade, the increasing complexity and energy demands of Artificial Intelligence (AI) applications have highlighted the limitations of traditional von Neumann computing architectures, where the physical separation between memory and processing units introduces a performance bottleneck from data passing. To overcome this challenge, Analog In-Memory Computing (AIMC) emerges as an energy-efficient alternative by enabling parallel in-memory Matrix-Vector Multiplication (MVM)-a core operation in AI models- significantly improving energy efficiency and latency by bypassing data transferring. AIMC cores accelerate MVMs exploiting a crossbar array architecture, which encodes the synaptic weights into cross point conductance levels. Among the emerging non-volatile memory technologies, Resistive Random Access Memory (ReRAM) devices provide multi-bit storage capabilities, suitable for accelerating neural network operations.
Novel ReRAM technology based on CMO-HfOx has further demonstrated enhanced properties, such as long-term state retention, low stochasticity, and highprecision memory programming and reading
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