This thesis presents an integrated temporal and energy analysis of the test flow for RRAM non-volatile memory modules embedded in the AURIX™ TC45x microcontroller. The main objective is to define a methodological framework for characterization, aimed at identifying key performance metrics, the most suitable measurement approaches, and the supporting tools required to evaluate system performance and energy efficiency. The work describes the data acquisition and analysis process, carried out under different operating configurations and architectures, single-core and multi-core, with the goal of identifying bottlenecks and opportunities for global test flow optimization. The timing analysis decomposes the total execution time into its main components, highlighting the dominant contribution of firmware activities; the energy analysis, based on current measurements across multiple voltage domains, identifies the system sections most critical in terms of power efficiency.