Juan Jose Restrepo Toro
Reconfigurable FPGA-based System for a Synchronous MEMs-Microphone Array Setup.
Rel. Fabrizio Riente. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2025
Abstract
Over the years, microphone arrays have been widely used to meet the demands of various acoustic applications. More recently, FPGAs have emerged as a powerful alternative to DSPs and software-based codecs for processing array data, offering parallel processing capabilities and high-speed acceleration essential for real-time audio streaming applications. This thesis focuses on the design and implementation of a real-time digital signal processing pipeline for a synchronous MEMS-microphone array setup, targeting an FPGA platform. The work addresses the challenges of high-throughput PDM (Pulse Density Modulation) signal acquisition and its conversion to PCM (Pulse Code Modulation), using optimized filtering techniques such as CIC and FIR filters.
The thesis explores hardware-software co-design on the AMD Kria KR260 board, facilitating efficient processing of multi-channel audio signals
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