Damiano Trovato
Design of circuital blocks for a for a Low Quiescent Current LDO.
Rel. Fabio Pareschi, Francesco Gabriele, Marco Catania. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2025
Abstract
The increasing diffusion of portable electronics, biomedical implants and Internet of Things (IoT) devices has intensified the need for integrated circuits capable of operating under stringent energy constraints. In such systems, not only the active power but also the standby power consumption has become a critical factor, as devices often spend the majority of their lifetime in idle or sleep states. Hence, it is crucial to reduce leakage and standby current in order to extend battery lifetime. Today, power consumption is a fundamental constraint that has left a significant footprint in both circuit and system design. A widely adopted solution consists of turning off the Bandgap Generator (BG) of the system by means of a Sample-and- Hold (S/H).
In this way, a substantial reduction of the average current consumption can be achieved, provided that the bandgap and the S/H operate correctly
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