Modern CPU microarchitectures heavily utilize out-of-order logic to extract instruction-level parallelism from programs. This significantly increases complexity, as instructions must be tracked throughout their lifespan in the core until their results are visible to the programmer. This tracking incurs a mandatory base cost for each instruction, regardless of its complexity. RISC instruction set architectures, such as ARM, include several instructions which can be executed cheaply: in this case, the power consumption associated to handle the reordering of operations is much higher than that needed for execution. Instruction fusion is a microarchitectural technique which aims to solve this problem. It consists in merging two instructions before execution, to increase the average work per instruction and make better use of resources.