Shizhen Liu
Fault grading at analog-digital boundary in mixed signal systems on chip.
Rel. Matteo Sonza Reorda, Michelangelo Grosso. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2024
Abstract
With the rapid development of consumer electronics, Internet of Things, smart cars and other fields, more and more application-specific integrated circuits (ASIC) need to be developed and projected. In particular the analog mixed signals (AMS) ASIC can interface themselves with analogic modules and they can be applied for different purposes. An AMS ASIC can be summarized as it is constituted by a digital logic part that elaborates and processes the signals from the analogic modules. The continuous increase in circuit complexity of AMS ASIC also brings challenges to circuit testing. During their fabrication, some physical defects between the interconnections of the analogic modules and the digital section could arise.
The focus of this thesis is the development of a testing flow for the analog-to-digital (A/D) interface in AMS circuits able to find these defects
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