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System Level Test methodologies for complex timer peripherals

Davide Fogliato

System Level Test methodologies for complex timer peripherals.

Rel. Paolo Bernardi, Francesco Angione. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2024

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Abstract:

The thesis work will focus in the generation of System Level Test procedures aiming at complementing the weaknesses of structural test methods. The case of study will be a complex timer module of an industrial System-On-Chip. This research will show different approaches adopted to produce programs suitable to test that parts of the component that are less stressed, and that can only be covered by specific functional procedures. Each method is described and detailed in order to provide a clear understanding of the motivations behind its choice, exploring solutions that are consistent with the analysis of the results obtained by the simulation to which each test is subjected.

Relators: Paolo Bernardi, Francesco Angione
Academic year: 2023/24
Publication type: Electronic
Number of Pages: 93
Subjects:
Corso di laurea: Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering)
Classe di laurea: New organization > Master science > LM-32 - COMPUTER SYSTEMS ENGINEERING
Aziende collaboratrici: Politecnico di Torino
URI: http://webthesis.biblio.polito.it/id/eprint/31082
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