Design of FPGA IP for modular architectures on VirtLAB board
Andrea Bononi
Design of FPGA IP for modular architectures on VirtLAB board.
Rel. Massimo Ruo Roch. Politecnico di Torino, Master of science program in Electronic Engineering, 2024
|
Preview |
PDF (Tesi_di_laurea)
- Thesis
Licence: Creative Commons Attribution Non-commercial No Derivatives. Download (8MB) | Preview |
Abstract
The recent SARS-CoV2 pandemic put a great strain on university courses. Despite the access to physical infrastructures was prohibited, videoconferencing and recorded videos allowed to proceed with the lectures. However, engineering teaching should also involve real laboratory experiences to provide students fundamental skills. When it comes to electronic lessons, it was usually not possible to provide the students the majority of the required instruments, given their high cost. In this scenario, a low-cost experimental printed circuit board, namely the VirtLAB board, was developed at Politecnico di Torino to provide electronic students access to physical devices. Its architecture can be divided in a user section (containing an MCU and an FPGA that can be programmed by the students) and a master section (containing a HyperRAM, a QSPI flash and again an MCU and an FPGA that comes already programmed to provide a virtual replacement of the bench equipment).
Currently, it is still not possible to exploit the master section to its full potential
Publication type
URI
![]() |
Modify record (reserved for operators) |
