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AI Server architecture for latency mitigation and cheating prevention: MPAI-SPG solution

Daniele Spina

AI Server architecture for latency mitigation and cheating prevention: MPAI-SPG solution.

Rel. Marco Mazzaglia, Francesco Strada, Edoardo Battegazzorre. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2023

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With their rising popularity, computer games have become one of the most sought-after forms of entertainment worldwide. A growing trend among these games is online multiplayer functionality, allowing players from different locations to come together in a shared virtual world. However, network latency between players and the server can negatively impact gameplay by reducing responsiveness and introducing inconsistencies. Consequently, this can hamper player performance and diminish the overall quality of the gaming experience. In this thesis, we studied the solution proposed by the MPAI organisation, called Server Predictive Game, in short, SPG. SPG aims to construct a robust server architecture capable of anticipating future game states. Whenever the server notices any missing data from clients or the evaluated game state is too different from the anticipated one, the server modifies the game state by applying the SPG prediction. Since the system works even when the evaluated game state differentiates from the anticipated one, it also prevents cheating. This research focuses on a multiplayer online racing video game. The game was developed specifically for the project using an authoritative server architecture. To record a vast dataset for the training, we developed neural networks to automate player movement. Once the database was ready, we conducted extensive experiments to determine the optimal neural architecture and hyperparameters for the SPG's engines. After implementing the SPG components we integrated the trained networks inside the game. We studied the behaviour of the system, helping MPAI-SPG in its research.

Relators: Marco Mazzaglia, Francesco Strada, Edoardo Battegazzorre
Academic year: 2023/24
Publication type: Electronic
Number of Pages: 62
Corso di laurea: Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering)
Classe di laurea: New organization > Master science > LM-32 - COMPUTER SYSTEMS ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/30079
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