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New Techniques for automatic generation of input stimuli for detecting hardware faults in AI-oriented accelerators

Vittorio Turco

New Techniques for automatic generation of input stimuli for detecting hardware faults in AI-oriented accelerators.

Rel. Matteo Sonza Reorda, Annachiara Ruospo, Edgar Ernesto Sanchez Sanchez. Politecnico di Torino, Corso di laurea magistrale in Mechatronic Engineering (Ingegneria Meccatronica), 2023

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Abstract:

In recent years, Deep Neural Networks (DNNs) have become increasingly present and used in any field, and they are now a fundamental element for most artificial intelligence applications. Today, these networks are being introduced in the medical, automotive, financial and industrial fields (among the others), which today require high safety parameters. Hardware faults can compromise the functionality of the DDNs and the safety of the system on which they are connected; the increase use of DNNs in safety-critical domains has led to the need to accompany their exceptional performance with diagnostic mechanisms to ensure safety and reliability. Therefore, the issue of network resilience has become very important and it is now mandatory to introduce the ability to maintain standards performance while managing to inhibit, or correct, factors such as hardware-induced faults, wrong inputs and any type of disturbance. Considering DNNs for image recognition, this thesis proposes a new technique to generate high-quality test stimuli in the form of automatically generated test images. The goal is to create an Automatic Test Pattern Generation (ATPG)-based approach to generate an Image Test Library (ITL), with the task of identifying permanent faults. Going into details, the main idea behind the thesis is to create a virtual test environment in which to simulate hardware-induced faults through a fault campaign within various Neural Networks for image recognition. The ITLs are created by an evolutionary algorithm, which receives as feedback the observability of the outputs of the generated images. Therefore, the algorithm generates new images which have the effect of propagating the hardware-induced fault up to the output of the Neural Network. During the training of DNNs, the weights are modified and their influence re-balanced, this introduces a natural ability to mask irrelevant input elements. This feature is certainly very powerful, because it can allow to maintain the same performance, but at the same time it can hide the accumulation of vulnerabilities within the system. Therefore, the main task of the ITLs is that of reducing the masking effect of the model and enhance the detection of potential failures. The structure described is realised through the \textmu GP tool, an evolutionary algorithm, and the results have been collected on ResNet-18, ResNet-34 and DenseNet-161, three popular convolutional networks architecture. Two experiments are carried out, which differ in the amount of data collected when looking at the output. This genetic approach leads to an increase in the percentage of observable faults on the network output in both experiments, between the first and the last generation there is always at least a 10% improvement between all 3 networks. The experiment that collects the least amount of data is the one in which the output observability improves the most between generations, in particular ResNet-18 and ResNet-34 by 20% and 17% respectively, but it achieves a low final coverage of observable faults, around 60% of those injected. The experiment with a larger amount of data to handle has similar improvements with higher time and computational cost, but the last generation allows a coverage of 76% in all networks. The data collected shows that the proposal is valid and that the method is functional to effectively detect the occurrence of faults by observing the output of the networks.

Relators: Matteo Sonza Reorda, Annachiara Ruospo, Edgar Ernesto Sanchez Sanchez
Academic year: 2022/23
Publication type: Electronic
Number of Pages: 63
Subjects:
Corso di laurea: Corso di laurea magistrale in Mechatronic Engineering (Ingegneria Meccatronica)
Classe di laurea: New organization > Master science > LM-25 - AUTOMATION ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/27698
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