In recent decades, researchers are taking an increasing interest in defining new quantum algorithms, following a prospect of computational speedup. However, their functional verification is still challenging and expensive since real quantum hardware is costly and limited in terms of qubit count and noise, and software simulators suffer from very long execution times. This thesis presents AEQUAM, an Area Efficient QUAntum eMulator, to provide a faster and more accessible toolchain for the functional verification of algorithms defined according to the quantum circuit model. The emulator is a Field-Programmable-Gate-Array (FPGA)-based digital architecture, specialized in executing the operations needed to evaluate the ideal behavior of a given circuit.