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FPGA implementation of an images classifier

Giulio Naggi

FPGA implementation of an images classifier.

Rel. Maurizio Martina. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2021

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Artificial intelligence is one of the main topic in nowadays scientific researches and it is starting to be appealing also for industrial productions. Due to the increase of interest of the industries, Xilinx, one of the major hardware supply companies, decided to create a development flow that allows to accelerate the production of artificial intelligence based systems. This thesis is centered on the study of the tool that allows to use the Xilinx new development flow, called Vitis AI. An overview on its functioning and its main component will be provided together with a project example whose main purpose is exploring the practical usage of the tool-chain. In addition to that, the project has been extended to include the design of a hardware accelerator that allows to increase the performances of the developed application by transforming a software function into a hardware component.

Relators: Maurizio Martina
Academic year: 2021/22
Publication type: Electronic
Number of Pages: 103
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: ALTRAN ITALIA spa
URI: http://webthesis.biblio.polito.it/id/eprint/21277
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