polito.it
Politecnico di Torino (logo)

Multiplier for quantum cryptography algorithms in FPGA

Alberto Vaudagna

Multiplier for quantum cryptography algorithms in FPGA.

Rel. Maurizio Martina, Guido Masera. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2021

[img]
Preview
PDF (Tesi_di_laurea) - Tesi
Licenza: Creative Commons Attribution Non-commercial No Derivatives.

Download (2MB) | Preview
[img] Archive (ZIP) (Documenti_allegati) - Other
Licenza: Creative Commons Attribution Non-commercial No Derivatives.

Download (1MB)
Abstract:

The ever changing world require, day after day, an increasing amount of data to be transmitted and stored in servers. With this amount of data the problem of make data accessible only to the owner or to maintain this data secret among an organization has increased. Hence the field of Cryptography has gain success in modern times, especially in today world, where the advance of quantum computing could make the cryptography system less secure by breaking old RSA systems. It is important to develop new system that are still secure against quantum computer attacks. To overcome such problems, the NIST (National Institute of Standard and Technology) have host a competition in order to create new technologies that are still secure against quantum computer attacks. This competition, that now is in round three, have seen around 70 different systems that after the different rounds have been reduced to the final 15. Among those, LEDACrypt, developed by Italian researchers from Università delle Marche and from Politecnico di Milano have reach Round2, but due to a severe flow in how the private key is computed the system didn't reach Round3. Despite this failure, this system introduce a new LDPC decoders, called Q-Decoder, that have also interested in the world of communication systems. A similar system, called BIKE, based on the same idea of using quasi cyclic matrices to represent the private/public key have reached round 3 of the competition. This thesis aims to find an optimized implementation of this decoder in hardware, by speed up the polynomial multiplication that are used during the Q-Decoder algorithm. The thesis is divided into three chapters, initially an introduction to code theory and circular matrices is provided, than an introduction of crypto systems and LEDA is presented. Finally the last chapter analyze the development system that aim to optimize one of the key operation of the Q-Decoder that is a particular type of polynomial multiplication called vector by circulant operation by computing it as cyclic convolution. This convolution is performed in the Fourier domain as the complex multiplication between two complex vectors obtained by performing the FFT of the two bit sequences. The final result can be obtained by applying the inverse Fourier transform.

Relators: Maurizio Martina, Guido Masera
Academic year: 2021/22
Publication type: Electronic
Number of Pages: 102
Subjects:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/20612
Modify record (reserved for operators) Modify record (reserved for operators)