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Programmable LiM: a Modular and Reconfigurable Approach to the Logic in Memory

Umberto Casale

Programmable LiM: a Modular and Reconfigurable Approach to the Logic in Memory.

Rel. Mariagrazia Graziano. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2020

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The data traffic between the CPU and the memory is the bottleneck for the processor's performance. The Logic in Memory approach breaks down this wall: the Memory becomes much more than a storage device, that is a smart unit able to perform logic operations directly inside it. So, this approach shifts the processor architecture from a CPU center to another one where the processor is not involved in every computation. The space of logic in memory has been explored for years, with several different approaches, all AISC-like. This thesis work explores the logic in memory with a modular approach called LEGO-Like approach. The goal is to have a smart array that can be adapted for handling a wide range of applications. The designer builds the smart memory according to his specifications: an RTL library of components is his design space. In other words, he builds up the memory by choosing the bricks to use from the library first and then assembling them together.The instruction set of the memory is laid down once the designer has built up the LiM array. Then, the programmer can write programs that will run on it. First of all, the state of art of the Logic in Memory is explored for contextualizing where this thesis works. Several architectures are explored: from a technological level up to the RTL level. Then, the LEGO-Like approach is presented, from the high level architecture down to the RTL design of each block. The last step is the performance evaulation. The goal is to answer two questions trough the performance evaluation : what is the overhead due to the smart features? Is it worth it in comparison to a RISC-like processor? The test-bench used is a Binarized Convolution Neural Network: it was implemented on both a RISC-like processor(the DLX) and two LEGO LiM Units. The result is clear: the overhead due to the LiM instruction set does worth it for highly parallelizable algorithms. The Lego LiM architecture allows to implement the algorithm extremely faster and with a smaller power dissipations.

Relators: Mariagrazia Graziano
Academic year: 2020/21
Publication type: Electronic
Number of Pages: 138
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: New organization > Master science > LM-29 - ELECTRONIC ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/15849
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