Modern embedded system design have a greater complexity than in the past which is increasing more and more, High Level Synthesis (HLS) increases the design abstraction level and thanks to it, it’s possible to generate, with less effort, optimized register transfer level (RTL) hardware in terms of performance, area and power requirements. This thesis proposes an application of the new multi-threading synchronization paradigms introduced in the C++14 standard, such as futures and promises, to the design of digital electronics components, with a special attention to High Level Synthesis.