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Development of an Online Redundant MAC for integration in a RISC-V SoC

Alessandro Fici

Development of an Online Redundant MAC for integration in a RISC-V SoC.

Rel. Edgar Ernesto Sanchez Sanchez. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2020

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This report is a summary of part of my internship work at TIMA laboratory, Grenoble, France. Energy management is becoming more and more important in today’s IT field, especially when dealing with battery-powered devices. Internet of Things devices in particular, require an extreme power consumption optimization and surface area reduction, while retaining the performances acceptable. One way to achieve this target is the sacrifice of computing precision thus leveraging the approximate computing paradigm. This work is therefore based on a new Multiply and Accumulation unit, designed by TIMA laboratory members, that aims to reach the above mentioned target by exploiting redundant arithmetic and on-line operators. It makes possible to adapt the precision depending on the application. Since this unit is using a different numbering system than pure binary, it was needed an input/output conversion wrapper which allows to communicate with the external binary world and to be compared with existing binary solutions. Then a testing phase in a real environment to explore all the pros and cons of the unit had to be carried on, to know where to focus the possible improvements.

Relators: Edgar Ernesto Sanchez Sanchez
Academic year: 2019/20
Publication type: Electronic
Number of Pages: 51
Corso di laurea: Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering)
Classe di laurea: New organization > Master science > LM-32 - COMPUTER SYSTEMS ENGINEERING
Aziende collaboratrici: UNSPECIFIED
URI: http://webthesis.biblio.polito.it/id/eprint/15343
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