Nowadays, integrated circuits are becoming more and more complex. Integrating multiple functions on a single silicon chip, reaching transistor counts up to tens of billions makes the design hard, and the verification process even more complex. According to Moore’s law the number of transistors integrated on an Integrated Circuit (IC) doubles every two years, and this leads to an exponential complexity for testing and verification. While formal verification has shown promising results for proving the correctness of hardware designs, it can only be done by very few experts and is typically restricted to automatic techniques. Thus dynamic verification is still the most easily accessible approach used for verification.