Sub-threshold design of arithmetic circuits: when serial might overcome parallel architectures - WebThesis

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Sub-threshold design of arithmetic circuits: when serial might overcome parallel architectures

Simone Fini

Sub-threshold design of arithmetic circuits: when serial might overcome parallel architectures.

Rel. Luciano Lavagno. Politecnico di Torino, Master of science program in Electronic Engineering, 2019

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Luciano Lavagno

Publication type

Electronic

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https://webthesis.biblio.polito.it/id/eprint/12534

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