SLX FPGA is one of the main products developed by Silexica to address, in an automatic way, the problem of sequential code optimization for parallel execution and Hardware/Software partitioning for FPGA-enabled SoCs. In other words, the input C/C++ user application is analyzed, identifying parallelization opportunities, optimized, distributing effectively the partitions in the available resources (CPU and FPGA), and compiled into the target, in order to achieve faster execution times. The first and probably the most important step carried out by the tool is the Analysis phase. Relying on sophisticated compiler technology, both static and dynamic analysis are performed to fully understand the user code and thus enable subsequent optimizations.