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List of theses with "Tenace, Valerio as relator"

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Jump to: 26 October 2017 | 29 October 2018
Number of items: 2.

26 October 2017

[img] Federico Pugliese. Optimization and compression methods for recurrent neural networks on-chip. Rel. Andrea Calimera, Valerio Tenace. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2017

29 October 2018

[img] Nicolo' Morando. Design of a distributed control unit for reconfigurable CNN accelerators. Rel. Andrea Calimera, Valerio Tenace. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Informatica (Computer Engineering), 2018

This list was generated on Mon May 20 15:11:09 2024 CEST.