Giuseppe Cesarano
FPGA Implementation of a Deep Learning Inference Accelerator for Autonomous vehicles.
Rel. Maurizio Martina. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2018
|
Preview |
PDF (Tesi_di_laurea)
- Tesi
Licenza: Creative Commons Attribution Non-commercial No Derivatives. Download (6MB) | Preview |
Abstract
The thesis discusses the implementation of the NVIDIA Deep Learning Accelerator (NVDLA) with FPGA. The NVDLA is a special purpose accelerator of neural network architectures for Deep Learning Inference, developed by NVIDIA, and whose code has been released by the developers for free. First of all, an overview about deep learning and convolutional neural networks is given. Then, different categories of accelerators are introduced, providing examples of applications belonging to each of these categories, and analyzing their performances and applicability in the automotive field (GPUs, manycore architectures, neuromorphic devices and specific purpose accelerators have been considered). After having considered similarities and differences among the different accelerators, the NVDLA system is described, highlighting its modularity and configurability.
Each single block is explained and an overview about how the system works is given
Relatori
Tipo di pubblicazione
URI
![]() |
Modifica (riservato agli operatori) |
