On the Development of Radiation-Hardened High Performance Computing Nodes for Satellite Systems

In recent years, there has been a growing demand for High‑Performance Spaceflight Computing (HPSC) to support next‑generation space missions characterized by increasing autonomy, heterogeneous sensor networks, and the integration of onboard artificial‑intelligence algorithms. The aim is to develop autonomous and efficient systems that are able to support remote autonomous operations, on-board data processing for deep space missions. However, adopting such systems in aerospace and avionics requires significant safety and reliability challenges as these safety‑critical applications must ensure continuous operation even in the presence of radiation‑induced effects that can affect electronic devices and alter system behavior. This work proposes an efficient, reliable, and scalable computing architecture based on a two-node core implemented on ZCU102 FPGA boards connected by a single optical‑fiber link. The system is organized around three fundamental components: the processing unit, the communication node, and the optical channel connecting the boards. Each node integrates a 100 MHz NEORV32 soft‑core—an open‑source, RISC‑V International–compliant processor configurable at the microarchitectural level—which is used both to manage inter‑board communication and to manage node‑level compute resources. Inter‑node data movement employs the Aurora protocol over optical fiber to provide high bandwidth, immunity to electromagnetic interference, and stable long‑distance signaling while reducing cabling complexity and failure points. The NEORV32–Aurora interface is implemented with AXI4‑Stream, an interconnect standard defined by ARM and adopted by AMD/Xilinx for high‑speed data transmission between hardware modules. AXI‑Stream enables efficient point‑to‑point dataflow via a ready/valid handshake, making it particularly suitable for FPGA implementations that require continuous transfers, such as optical communication systems or distributed processing architectures. Finally, the optical‑fiber channel has been analyzed for efficiency and resilience by evaluating parameters such as data rate, bit‑error rate (BER), and link stability. To enhance system resilience, the Aurora module supports partial reconfiguration, allowing rapid recovery from communication faults with minimal downtime. Given its small area footprint, the NEORV32 processor is protected with Triple Modular Redundancy (TMR) and majority voting. The architecture is evaluated through emulation‑based fault‑injection campaigns that assess link integrity and continuity of operation under adverse conditions. Experimental results show that the system maintains data integrity and service continuity, demonstrating strong fault tolerance and the reliability of the optical interconnect. The proposed platform advances the design and validation of high‑performance, fault‑tolerant space computing using commercial reconfigurable devices and high‑efficiency optical links. It lays the groundwork for modular multi‑node deployments and integration into CubeSat platforms. Future works will scale the system to four or more nodes, integrate it into CubeSat satellites, and adopt improved mitigation techniques to increase system availability and resilience.