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Model-Based Design and FPGA Implementation of a Pulse Detection Algorithm for Optical and RF Interrogations in Avionic application

Giuseppe Rinaldo

Model-Based Design and FPGA Implementation of a Pulse Detection Algorithm for Optical and RF Interrogations in Avionic application.

Rel. Mario Roberto Casu. Politecnico di Torino, NON SPECIFICATO, 2025

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Abstract:

Modern airborne electronic computer implement pulse detection algorithms, that are fundamental for interpreting signals from ground station interrogations and laser-optical warning systems. These systems play a crucial role in aircraft’s situational awareness and threat mitigation, in particular in complex operational environments. These type of algorithms require efficient signal processing capabilities while maintaining high detection accuracy, in order to be capable of identifying fast and transient pulse signals while minimizing false detections. At the same time, these algorithms must maintain low latency and minimal hardware overhead, in order to ensure optimal real-time performance that are typical of modern avionics systems. To address this challenge, the use of High-Level Synthesis (HLS) tool within a model-based design framework provide a promising approach for implementing signal processing algorithms on FPGA platforms. This methodology enables a more abstract and modular design process, allowing rapid prototyping, early verification and effective design-space exploration. Moreover, it simplifies the development of optimized hardware architectures and resource utilization, computational efficiency and energy performance. This thesis focuses on the design and implementation of a pulse detection algorithm targeting FPGA platforms through Siemens EDA Catapult HLS tool. This work includes the development, simulation and synthesis of the algorithm, with the evaluation of its hardware characteristics, including logic utilization, latency and power consumption. Furthermore, the study explores different architectural configurations and processing strategies to assess the trade-offs between performance and hardware resource overhead, offering insights into the optimal design choices for real implementation in aerospace applications.

Relatori: Mario Roberto Casu
Anno accademico: 2025/26
Tipo di pubblicazione: Elettronica
Numero di pagine: 124
Soggetti:
Corso di laurea: NON SPECIFICATO
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: LEONARDO SPA
URI: http://webthesis.biblio.polito.it/id/eprint/37691
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