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Analysis and Design of millimetre-wave GaAs Stacked Power Amplifiers

Alessandro Panzera

Analysis and Design of millimetre-wave GaAs Stacked Power Amplifiers.

Rel. Chiara Ramella, Marco Pirola. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2025

Abstract:

In RF communication systems, the transmission (TX) and reception (RX) processes involve various stages and components to ensure proper communication. Due to air attenuation, it becomes crucial to enhance the input signal using a RF high-power amplifier before transmission. Recently, the stacked FETs topology started to be used in high-frequency applications connecting transistors in series instead of in parallel, allowing the possibility to reach a proper distribution of the voltage drop across the transistors, very close to the device breakdown voltage. In the thesis, the stacked-FETs Power Amplifier (PA) topology was analyzed using a new approach. The aim is to derive analytical design equations for both the gate capacitance of the pseudo-common gate stages and the Inter-stage Matching Network (InMN) components, allowing the optimum load to be seen at each stage, delivering the maximum possible output power. In order to validate the theory, as example a real GaAs-PH10 FET produced by the UMS foundry has been used. The working frequency selected for the design is 28 GHz. Afterwards, a small-signal equivalent model of the PH10 transistor was extracted around the working frequency with the goal of reproducing as accurately as possible the frequency behavior of the device, because of the design depend on its intrinsic parameters. Subsequently, the extracted values are used inside the derived equations to implement the stacked PA design in order to verify whether the theory is actually applicable to a real device, what its level of validity is, and how far it is from the optimal solution that can be obtained through classical design approach by simply tuning the design parameters. Finally, the circuit components of the design are replaced with their equivalent realized using UMS technology.

Relatori: Chiara Ramella, Marco Pirola
Anno accademico: 2024/25
Tipo di pubblicazione: Elettronica
Numero di pagine: 110
Informazioni aggiuntive: Tesi secretata. Fulltext non presente
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: Politecnico di Torino
URI: http://webthesis.biblio.polito.it/id/eprint/35300
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