Multiscale Thermal Estimation for 2.5D/3D Chiplet-based High-performance Server SoCs

Advanced heterogeneous integration through 3D technology has become a critical enabler for modern integrated circuits (ICs), addressing many of the inherent limitations of traditional 2D architectures. However, this progress introduces significant thermal management challenges due to increased power consumption, making accurate thermal estimation essential. The use of fast and accurate thermal models is therefore crucial for thermal-aware design from the early stages of IC development. Traditional methods such as finite element methods (FEM) offer high accuracy but face challenges in system-level analysis due to computational inefficiency. To overcome this, compact thermal models (CTMs) have been introduced, significantly improving simulation time with minimal loss of accuracy. This thesis focuses on the evaluation and extension of CTMs to enhance their utility in various thermal management scenarios, proposing a methodology to account for non-uniform power dissipation in high-performance computing (HPC) server SoC designs. The proposed methodology is built upon HotSpot, one of the most widely recognized open-source thermal tools in the EDA research community. Key modifications include the integration of customizable package configurations and the modelling of anisotropic thermal conductivity. A multi-scale simulation approach is also proposed to detect localized hot spots in complex architectures, where full-system simulations are computationally prohibitive. The effectiveness of the methodology is demonstrated through case studies involving 2D and 3D chiplet-based 2.5D SoC architectures, using N7 FinFET and A10 Nanosheet CMOS technology nodes, the latter representing an advanced node. The results from the steady-state analysis show significant differences in heat distribution when applying the proposed methods, with a noticeable increase in peak temperatures across the test cases after considering the non-uniform power scenario. Additionally, the multi-scale resolution approach achieves thermal resolutions as fine as 3.5 μm, resulting in memory footprint reductions of up to 99.8%, while maintaining average peak temperature errors within 2°C.