Survey on Machine Learning and Artificial Intelligence used for Electronic Design Automation

The complexity of EDA tools for ICs are crucial enablers for the semiconductor industry as the size of integrated circuits (ICs) have been increasing enormously. With groundbreaking innovations in IC design and integration, some chips even have up to billions transistors, in the meanwhile the slowing down of Moore's Law have caused that the number of transistors per design increases exponentially and doubles every two years. Consequently, the corresponding design space which originally supposed to be searched for an implementation that satisfies all specifications and then optimizes all related factors concerned as NP-Hardness problem in EDA like power, area, delay (PPA) and runtime, etc. Along side this phenomenon, Machine Learning (ML) based algorithms which could be used to enhance EDA tools and processes as Functional simulation, Logical synthesis, Physical design (Placement $\&$ Routing mainly included) and some specific techniques that used to do verification and test as Formal verification. Machine Learning techniques have been employed in many domains with great success because of their ability to build powerful models from data. Consequently, ML has also been applied in computer engineering where it guarantees to complement the insufficiency left by heuristic algorithms and start other new possibilities. Employing ML-based algorithms gives the designers space to cultivate the abstraction level by concentrating to the objective itself only and leave the practical details on how to reach the ultimate goals to the ML models. This thesis provides a comprehensive survey of the specific steps and techniques mainly used in state-of-art EDA tools that use machine learning algorithms. The ML-based EDA tools are categorized based on the IC design steps and techniques which are functional simulation, formal verification, logic synthesis, placement and routing separately. State-of-the-art ML-based VLSI-EDA tools, current trends, and future perspectives of ML in VLSI-EDA are also discussed in the end.