Design of an ultra-low-power S/H bandgap voltage reference in a new BCD technology

Design of an ultra-low-power S/H bandgap voltage reference in a new BCD technology A bandgap is a voltage reference circuit that plays a major role within integrated circuits; it provides a reference that is invariant to supply voltage variations and temperature changes, so it is an essential building block for proper operation in a variety of applications, such as ADCs, DACs, DC-DC converters. The growing trend of ultra low power devices has led to the necessity for voltage and current references to consume less and less power, to affect as little as possible the consumption of final devices, but at the same time maintain the essential requirements of accuracy and invariance to temperature and power, which are commonly demanded. In the past, in order to reduce the required power, the bias currents of the transistors have been scaled to lower values. However, reducing the bias current, has an impact on the bandgap performance, since, as the currents decrease, there is an increase in resistors which degrades the performance of noise and increases the area required for bandgap implementation. The aim of this thesis is to investigate sample and hold solutions suitable for reducing the power consumption of bandgap circuits while maintaining the advantages of classical bandgap structures, such as those proposed by Widlar or Brokaw. A sample and hold structure allows the core to be activated for short periods of time so that the bandgap is biased with currents on the order of micro amperes, with the advantages of small resistor size, low noise, and low area usage. In the thesis, the design of a Brokaw cell that meets the required temperature, power and noise specifications will be discussed; this cell will form the core of the final bandgap. Next will be described the implementation of a sample and hold structure, suitable for sampling and holding the voltage reference output from the core. The core output is maintained on a capacitance, for hold times in the order of a second without substantial degradation of the sampled value, which from simulations is on the order of a few tens of microvolts per second in the worst case. In the design of the sample-and-hold structure, special attention will be paid to the switches, which represent a critical point, since, as the temperature changes, the leakage introduced by switches is the main source of disturbance to the voltage value coming out of the bandgap, so a leakage current minimization circuit will be implemented. The latter requires a second bandgap to operate, with bias currents on the order of nanoamperes, instead of microamper and so with lower performance than the main core.