Adapting Deep Neural Networks on edge devices, including hardware accelerators as done in this thesis, is in general very challenging due to very specific low-level constraints, like the lack of available memory, the maximum layer dimension allowed and the limited type of layers and high-level architectures actually implemented on hardware. In the context of the Semantic Segmentation, given that a lot of parameters are needed to well classify every pixel of the image, the problem of the limited amount of memory is particularly emphasized. But if the transposition to the edge of the network is done properly , the overall process is worthy, because it can offer benefits such as faster performance, decreased power usage, reduced latency and enhanced parallelism.