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Hardware development and prototyping of MIMO imaging RADAR adopting innovative single-chip mmWave FMCW sensor

Antonio Zappatore

Hardware development and prototyping of MIMO imaging RADAR adopting innovative single-chip mmWave FMCW sensor.

Rel. Riccardo Maggiora. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2022

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Abstract:

Every year, novel RADAR-based sensing solutions are developed to manage the demand for accurate and autonomous operations in a wide range of field. An example is the automotive sector, where RADAR systems contribute to improve the driver safety. The increasing popularity of these devices imposed a change in the regulation of the spectrum band in which they can operate, pushing industries to develop RADARs in the millimeter wave band. The 76 - 81 GHz band introduces new challenges during the design stage; however, the high frequency range allows an increased available bandwidth, and it permits further system scaling. The scaling of these devices is mainly devoted to the smaller antenna dimension and the monolithic implementation of the RADAR sub-system integrated in a single chip which enable the creation of compact products. The project presented in this master thesis aims to the development of an AWR2944-based RADAR system embedded on a Printed Circuit Board. The second-generation RADAR chip, manufactured by Texas Instruments, brings new features with respect to the first-generation one which are crucial for the detection accuracy improvement. The increased internal ADC sampling frequency, and the lower Noise Figure associated to the RF stage of the AWR2944 with respect to the previous RADAR chip versions provide a higher maximum unambiguous range and an improved overall target detection respectively. Moreover, the additional transmitting stage ensures a better detection performance exploiting the Multiple-Input Multiple-Output method in combination with the Minimum Redundancy scheme. Nevertheless, the introduction of the Ethernet interface in the AWR2944 chip enables the exchange of large quantities of data with other sub-systems. The starting point of this work was the Printed Circuit Board design that embeds the first-generation AWR1843 chip. The initial system architecture corresponding to the analog, digital and RF part have been analyzed and modified accordingly to make them compliant with the second-generation chip requirements. The board stack-up and the layout design have been optimized considering the Signal Integrity and the Power Integrity aspects for critical traces and planes. After the Printed Circuit Board has been manufactured and the components have been assembled; the RADAR system has been tested in order to check functionalities and quantify the improvements with respect to the first-generation system.

Relatori: Riccardo Maggiora
Anno accademico: 2022/23
Tipo di pubblicazione: Elettronica
Numero di pagine: 152
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: NON SPECIFICATO
URI: http://webthesis.biblio.polito.it/id/eprint/25590
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