Single neuron SNN with Memristor Generated Delays for Real-Time Analysis of Temporal Signals

The most powerful computing machine for doing classification with low energy consumption is the brain with its known and unknown behaviors and working principles. Partially inspired to the brain, neural networks established a paradigm in which the computational power is increased with a trade-off in terms of accuracy and power consumption. Indeed, in such a paradigm, neurons, synapses and the architectures deriving from their combination are used for solving non-linear classification tasks with the objective to reach the highest possible accuracy without any regard to power consumption. Neuromorphic computing aim is to solve the energy-accuracy trade-off by using all the possible knowledge from biology in order to define a scientific paradigm in which the biology knowledge is not only mathematically represented, but also implemented on-chip for taking advantage from Silicon technology higher efficiency in terms of electrical behavior. Moreover, thanks to the rise of memristor technology, the integrability and scalability of such devices increased in the last years following the energy efficiency trend. Such chips are based on the so-called spiking neural networks, i.e. neural networks which are quasi-totally inspired by brain mechanism from the signal encoding into spikes -as the name suggests- to neuron and synapse models arriving up to, in certain cases, the network structure. These networks allow to combine deep learning approach for achieving high accuracy results with ultra-low power consumption thanks to brain inspiration and analog electronics circuits. In this thesis a novel architecture based on multi-synapse on dendrites connections -inspired from novel biological discoveries- exploiting temporal delays generated through memristors is presented for doing ultra-low power real-time classification of time-varying signals. Its results on MIT-BIH ECG dataset obtained through hardware-aware Python-based simulations are presented as a proof of concept of the effective working of the network showing how large memristor employment can allow to reach lower energy consumption and higher scalability while reaching very high accuracy results.