CPU Branch predictions microarchitecture modelling and analysis

Since now, in the constant effort to find ways to achieve better processor's performances, the develop of more precise branch predictors has been one of the most profitable path. Currently many studies noticed that improving the precision we do not receive a relevant upgrade in performance. This saturation is mainly due to certain branches hard to predict even with bigger predictors. To solve this problem we need to find another direction. One possible path of research could be found looking at the penalties caused by a misprediction. Assuming that we are forced to have a certain number of mispredictions we can find ways to reduce the time lost. The exploitation of a code’s characteristic called Control Independence could be a promising path. Control Independent instructions are those instructions that are executed regardless of the branch direction. They are located at the end of the taken/not-taken paths and they are independent on the branch outcome. Right now these instructions are flushed away and re-executed in case of misprediction and this may prove to be a waste of time. In this thesis we analyze the quantity of CI instructions inside the code and their characteristics looking at data and control dependencies. We study and describe methods to exploit CI, explained in several academic articles, searching for ideas that could represent a trade off between complexity of implementation and performance upgrade.