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Investigation of low temperature SiGe epitaxy with high order precursors

Manuel Mencarelli

Investigation of low temperature SiGe epitaxy with high order precursors.

Rel. Matteo Cocuzza. Politecnico di Torino, Corso di laurea magistrale in Nanotechnologies For Icts (Nanotecnologie Per Le Ict), 2021

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Abstract:

Since the strain technology was introduced at the 90nm node, Silicon-Germanium (SiGe) is the most widely used p-MOS Source/Drain (S/D) material. With the continuous down-scaling of transistors, the contact resistance (Rc) at the S/D-metal interface is becoming a major part of the parasitic resistance in the device. Rc depends on two factors: it is directly proportional to the contact resistivity (ρc) and inversely proportional to the contact area between electrodes and S/D. In order to decrease the Rc impact, different approaches have been studied in the last years. Complex doping engineering allows achieving ultra-low ρc, while a higher contact area can be guaranteed by implementing a wrap around contact (WAC). An increase of germanium concentration of SiGe S/D layers driven by increasing strain in the Si channel requires a decrease of epitaxial deposition thermal budget. To decrease the growth temperature, new silicon and germanium gas precursors are being intensively investigated to maintain a sustainable SiGe growth rate. In this work, different aspects of low temperature epitaxy of SiGe through high order precursors have been studied in order to improve p-MOS S/D layers. Initially, morphological and electrical properties of in situ Boron and Gallium co-doped SiGe layers grown on Si (100) substrate have been analyzed. In particular, after a first characterization the grown samples have been submitted to different Laser annealing temperatures to investigate dopants activation/deactivation and diffusion. The work aims to reach a better understanding of the Gallium doping behaviour in order to reduce S/D material resistivity which is currently limited by B solubility. Furthermore, low temperature SiGe growth on different Si surfaces has been studied with the use of a specially designed mask. The deposition on the patterned structure was initially tested with classic precursors to evaluate the different growth rates. Successively, it has been compared with low temperature processes based on high order precursors. This study helps to understand facets development in 3-dimensional future devices and consequently to avoid merging of S/D of adjacent fins, allowing WAC formation.

Relatori: Matteo Cocuzza
Anno accademico: 2020/21
Tipo di pubblicazione: Elettronica
Numero di pagine: 73
Soggetti:
Corso di laurea: Corso di laurea magistrale in Nanotechnologies For Icts (Nanotecnologie Per Le Ict)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Ente in cotutela: Interuniversity Microelectronics Centre (IMEC) (BELGIO)
Aziende collaboratrici: IMEC
URI: http://webthesis.biblio.polito.it/id/eprint/17879
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