Low density parity check (LDPC) codes are error correcting codes discovered in 1963 by Robert Gallager and they have been forgotten for many years because of the computational requirements needed to achieve the theoretical performance. LDPC codes can work with different block lengths and high rates and they can provide a good bit error rate in noisy channels and an high throughput. The aim of this work is to accelerate the LDPC decoder because it is a performance critical module for 5G due to its iterative algorithm. The flexibility of FPGAs is exploited to accelerate the decoder using a software solution provided by the OpenairInterface Software Alliance consortium (OAI).