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DExIMA: a Design Explorer for In-Memory Architectures

Nicola Piano

DExIMA: a Design Explorer for In-Memory Architectures.

Rel. Mariagrazia Graziano, Marco Vacca. Politecnico di Torino, Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering), 2019

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Abstract:

DExIMA, a Design Explorer for In-Memory Architectures, is a high-level simulator for Logic-in-Memory based architectures. It is developed manly to compare different hardware implementations to run the same algorithm. In this way the designer is able to choose an ASIC implementation suitable with its requirements before implementing it at a lower level, such an RTL description. After a brief introduction about Logic-in-Memory architectures, the thesis describes the tool DExIMA and how to use for estimating performance. Finally a benchmarking process is used to test the reliability of the tool.

Relatori: Mariagrazia Graziano, Marco Vacca
Anno accademico: 2019/20
Tipo di pubblicazione: Elettronica
Numero di pagine: 100
Soggetti:
Corso di laurea: Corso di laurea magistrale in Ingegneria Elettronica (Electronic Engineering)
Classe di laurea: Nuovo ordinamento > Laurea magistrale > LM-29 - INGEGNERIA ELETTRONICA
Aziende collaboratrici: NON SPECIFICATO
URI: http://webthesis.biblio.polito.it/id/eprint/12547
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