Efficiency optimization and design of analog circuits for a resonant DCDC converter for the LHC experiments upgrade

CERN (the European Organization for Nuclear Research) runs the largest particle physics laboratory in the world. Particle accelerators (in particular the Large Hadron Collider, LHC) and detectors are used at CERN to perform state-of-the-art experiments involving the collision of highly energetic particles. The High Luminosity LHC upgrade will allow performing more collisions per second, leading to a larger amount of data that can be collected by the detectors. This upgrade entails higher power consumption of the front-end circuits of the detectors and a minimization of the material used, so to optimize the physics performances of the experiments. Within this context, a specific power distribution system based on two steps of voltage conversion has been proposed, in order to properly supply the front-end circuits. The voltage conversion steps are performed by DCDC converters located close to the collision points, in a harsh environment characterized by high levels of radiations and high magnetic field (up to 4T). To face this challenge, radiation and magnetic field tolerant DCDC converters based on an Application Specific Integrated Circuit (ASIC) are in development, and several prototypes have been produced. A Resonant Switched Capacitor converter that targets the last step in the voltage conversion chain has been proposed, designed and prototyped. This converter steps down the voltage from 2.5V to 1.2V or 1V, providing a load current up to 3A. Two different output voltages are required so to properly supply, respectively, the analog and digital front-end circuits. The first part of this master thesis project has been devoted to the characterization and optimization of this prototype converter, in order to maximize its efficiency and minimize its mass and volume. A full electrical characterization of the converter has been performed together with an efficiency optimization, that has been achieved thanks to a careful choice of the most important passive discrete components. Basing on the results of the characterization campaign, the re-design of several analog blocks has been carried out in this work: in particular, an improved phase-locked loop (PLL) and a voltage-controlled oscillator (VCO) have been developed. Furthermore, the control circuitry has been modified so to improve the converter performances and reliability.