The thesis work is aimed to describe the development of a sequencer IP core for GRLIB library, which fills a gap in the Cobham Gaisler’s IP portfolio. The faced problem was that some SoC systems cannot include a processor. The project proposed by Cobham Gailser AB aimed to develop a dedicated core able to write to memory-mapped registers. The developed sequencer IP core is aimed to replace the LEON processor in any LEON/GRLIB SoC design that cannot include it. It can configure the system both at power-on and dynamically at run time, as well as initializing the system memory by writing words of fixed value zero within its entries.