Sample efficient strategies for parametric model order reduction of large-scale electronic systems

In recent years, numerical simulations have become a key component of the design workflow in the electronics industry, driven by the need for reduced time-to-market and the growing complexity of modern systems. However, those simulations are increasingly becoming the bottleneck of the workflow since a system-level, fully detailed simulation from the physics laws is now prohibitively expensive both from the computational and required time standpoint. Motivated by this industry problem, the use of macromodels, reduced-complexity behavioral descriptions of systems, has attracted growing interest from the academic community. In particular, research efforts have focused on incorporating an explicit parametric dependency into those reduced-order models in a way that preserves their computational efficiency while mitigating, at least partially, the effects of the curse of dimensionality. Generally these reduced-order models are built from data obtained either from commercial electromagnetic field solvers or from the solution of large-scale systems of (ordinary) differential equations. A commonly adopted solution to explore the parameter space is to sample along a high-dimensional structured grid using quasi-random sequences that guarantee uniform coverage, such as Latin Hypercube Sampling (LHS) or Sobol sequences. This requires performing a large number of simulations, and since it scales exponentially with the number of parameters, gathering the necessary data becomes computationally prohibitive for more than 3-4 parameters. This thesis addresses the aforementioned problem, proposing a model order reduction scheme with "predictive" properties in conjunction with two sampling strategies to efficiently explore the parameter space. The result is a model order reduction flow, successfully validated against real-world examples of microprocessor power delivery architectures provided by Intel Corporation, which can be employed to speed up a broad range of simulations such as time-domain power integrity verification, design optimization of fully integrated voltage regulator compensators and parametric variance-based sensibility analysis.