Enhancing RISC-V Security: Implementing TPM Functionality in a gem5 Simulation environment

Security in RISC-V architectures requires hardware solutions that can guarantee reliability, integrity, and data protection. In this scenario Trusted Platform Module (TPM) and Physical Unclonable Functions (PUFs) play a primary role in the context of hardware security. Trusted Platform Module (TPM) is a dedicated security chip consolidated as building blocks to obtain a trusted root point, offering a standardized set of features that cover cryptographic key generation and protection, platform integrity measurements, and remote attestation. PUFs are unique cryptographic primitives that exploit intrinsic variations in the physical characteristics of circuits to generate answers that are distinct and cannot be replicated. The objective of this thesis is to develop a simulation TPM model for RISC-V architecture integrated into gem5. The research was carried out in two phases: first, the implementation of key functionalities of the TPM 2.0 model according to the TCG specifications; second, the integration of PUFs into the TPM. In particular, the TPM has been extended to manage the forwarding phase of a challenge towards the PUF, which produces a response based on its intrinsic characteristics. The results of the simulations show that the developed framework allows faithful reproduction of the operations of the TPM and can be used to explore the benefits of combining it with a PUF in RISC-V environment, increasing the security by reducing the dependence on static secrets. Moreover, the choice of gem5 as the basic platform makes the tool accessible and flexible, allowing for experiments without the need for dedicated physical hardware. The primary contribution of this work is the creation of an open-source simulation environment for the TPM model on RISC-V. Future prospects include extending TPM 2.0 specifications, testing distributed authentication protocols in cloud and IoT contexts, and analyzing model resilience against advanced attacks.