This thesis investigates unconventional approaches to analog-to-digital conversion and on-chip signal generation, focusing on both the opportunities and the inherent limitations of architectures that deviate from mainstream solutions. The first part of the work is dedicated to the study of an ADC based on the Hopfield neural network model. A transistor-level implementation using resistive networks was developed, which revealed several critical challenges. In particular, the binary-weighted resistors result in a large time constant, necessitating sizable buffers to drive the resistive network. This introduces additional area and power overheads, while also making the circuit sensitive to kickback and requiring precise settling to maintain accuracy.